3 4 1234
21 30 32

: MC145170

  1. #21


  2. #22

    16.01.2013
    50
    US1GGA
    feller,
    , . -- . .

  3. #23

    17.06.2012
    311
    2852
    feller,
    , . -- . .
    , !

  4. #24

    16.01.2013
    50
    US1GGA
    feller, ...

  5. #25

    17.06.2012
    311
    2852
    feller, ...
    ???

  6. #26

    16.01.2013
    50
    US1GGA

  7. #27

    17.06.2012
    311
    2852
    , , .

  8. #28

    16.01.2013
    50
    US1GGA
    ! . 145170 , - . . . ... . ( 145170 - 45500 80000 ) .

  9. #29

    23.12.2010
    3
    Vladimir dobrii deni. 2852,Vladimir dobrii deni. U menia analogichinaia problemma s sintezom TRX "CODAN" ? er1zz Spasibo. email: nicolaebostan@mail.r u


  10. #30
      Genadi Zawidowski
    22.07.2004
    -
    10,881
    21
    UA1ARN
    :
    /* $Id$ */
    //
    //  HF Dream Receiver (  )
    //    mgs2001@mail.ru
    // UA1ARN
    //
    #ifndef MC145170_C_INCLUDED
    #define MC145170_C_INCLUDED
    
    //#ifndef WITHSPISW
    //	#error WITHSPISW should be defined for this chip
    //#endif
    
    #define MC145170_SPIMODE SPIC_MODE3
    /*
    	Programming MC145170D2
    	*/
    
    /* Number of clocks is: 9 to 13 */
    static void prog_mc145170_init(
    	spitarget_t target		/* addressing to chip */
    	)
    {
    #if 0
    	prog_select(target);
    	prog_unselect(target);
    
    	prog_select(target);
    
    	//prog_val(target, 0x00, 8);	/* Initialization sequence */
    	prog_val(target, 0x02, 5);	/* Initialization sequence */
    
    	prog_unselect(target);
    #endif
    }
    
    /* Number of clocks is: 8 */
    static void prog_mc145170_func(
    	spitarget_t target,		/* addressing to chip */
    	unsigned char pol		/* ph det polarity: 0- inv, 1 - direct */
    	)
    {
    	rbtype_t rbbuff [1] = { 0 };
    
    	RBBIT(007, pol);		/* C7: POL (1-with invertor, 0 - direct)	*/
    	RBBIT(006, 0x01);		/* C6: PDA/B - 0x00 - A, 0x01 - B (tri-state)	*/
    	RBBIT(005, 0x00);		/* C5: LDE		*/
    #if TESTPOINTS
    	RBVAL(002, 0x01, 3);	/* C4..C2: OSC0 0 - low, 2 - osc/2	*/
    	RBBIT(001, 0x01);		/* C1: Enables Fv output */
    	RBBIT(000, 0x01);		/* C0: Enables Fr output */
    #else
    	RBVAL(002, 0x00, 3);	/* C4..C2: OSC0 0 - low, 2 - osc/2	*/
    	RBBIT(001, 0x00);		/* C1: Enables Fv output */
    	RBBIT(000, 0x00);		/* C0: Enables Fr output */
    #endif
    
    	spi_select(target, MC145170_SPIMODE);
    
    	spi_progval8_p1(target, rbbuff [0]);	/* C bits */
    	spi_complete(target);
    
    	spi_unselect(target);
    }
    
    /* Set divider F osc R - 1, 5..32767 */
    /* Number of clocks is: 15 or 24 */
    void prog_mc145170_r(
    	spitarget_t target,		/* addressing to chip */
    	const phase_t * r		/* divider F osc R - 1, 5..32767 */
    	)
    {
    	const uint_fast16_t v = (uint_fast16_t) * r;
    
    	spi_select(target, MC145170_SPIMODE);
    
    	spi_progval8_p1(target, 0x00);	/* R bits */
    	spi_progval8_p2(target, v >> 8);
    	spi_progval8_p2(target, v >> 0);
    	spi_complete(target);
    
    	spi_unselect(target);
    }
    
    /* Set divider F in  N - 40..65535 */
    /* Number of clocks is: 16 */
    static void prog_mc145170_n(
    	spitarget_t target,		/* addressing to chip */
    	const phase_t * n		/* divider F in  N - 56..65535 */
    	)
    {
    	const uint_fast16_t v = (uint_fast16_t) * n;
    
    	spi_select(target, MC145170_SPIMODE);
    
    	spi_progval8_p1(target, v >> 8);	/* B bits */
    	spi_progval8_p2(target, v >> 0);
    	spi_complete(target);
    
    	spi_unselect(target);
    }
    
    #endif /* MC145170_C_INCLUDED */
    ... !

,

: 1 (: 0 , : 1)

  1. UR5FJZ
    ut7du
    : 34
    : 18.10.2010, 18:23
  2. : 6
    : 13.08.2010, 05:18
  3. : 24
    : 23.06.2008, 10:26
  4. UR5FJZ
    ut7du
    : 4
    : 13.07.2007, 10:07
  5. " UR5FJZ"
    rw3xc
    : 2
    : 22.05.2006, 18:08

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